In a transfer of data packets in a time multiplex process data packets are transferred within defined time slots or time channels, which can be repeatedly re-used for data transfer after a predetermined time. A group of time channels or else a single time channel provide so-called frames for transferring data packets. The frames in the synchronous digital hierarchy are, for example, referred to as synchronous transport modules (STM) and the data packets as so-called virtual containers. The so-called overhead or frame header of each frame contains phase reference identifiers, i.e., so-called pointers, for the data packets transported in the respective frame, which serve for determining the position of the corresponding packet within the respective frame.
When the frames and the data packets contained therein pass through a network device, they are subject to a delay (i.e. a propagation time). This delay can take on various values, if, for example, in a first scenario a first data packet passes through the network device on a first transfer path between input and output stage of the network device, causing a first delay, and a second data packet associated with the first data packet passes through on a second transfer path causing a second delay. The two transfer paths can, for example, lead over various modules of a switching matrix, input/output modules and cable strings, which with a more complex structure of the network device can easily be arranged spatially far apart, so, for example, the first data packet has to cover a 200 meters longer transfer path in the network device than the second data packet. However, two data packets are, due to different transfer paths, no longer in the same phase relation to one another at the output stage of the network device as at the input stage.
A second scenario relates to a network device with redundant devices, for example, with double switching matrices and double cable strings between input and output stage of the network device. The data packets pass through a first transfer path between input and output stage and in parallel through a second transfer path as a data packet copy. Ideally, at the output stage it should be possible at any time to switch over without loss of data from the first to the second transfer path and vice versa. This requires, however, that a data packet and its copy must be available exactly synchronously on the output side of the output stage. As a result of the first and second transfer paths possibly causing different delays, this is, however, not possible. It would admittedly be possible to construct the transfer paths of the network device in such a way that they cause perfectly identical delays by using identical switching matrices and cables of identical length and kind. However, this causes a considerable expense, if, for example, modules arranged directly side by side have to be connected via a cable of, e.g. 200 meters in length.